APA:Lokesh, C., Chethan, T.K., Pinto, N., ...Shankar, S., Rekha, K.R.. (Volume-10.1109/ICDCECE53908.2022.9793203, Issue- -(Year-2022)). Advanced CMOS VLSI Technology for Low Power Analog System Design with High Gain. Retrieved from https://ieeexplore.ieee.org/document/9793203
Chicago:Lokesh, C., Chethan, T.K., Pinto, N., ...Shankar, S., Rekha, K.R.. "Advanced CMOS VLSI Technology for Low Power Analog System Design with High Gain" Example, Volume-10.1109/ICDCECE53908.2022.9793203-issue--Year-2022-2179-7796. https://ieeexplore.ieee.org/document/9793203.
