Performance and analysis of Single-channel and Multiple channel based Approximate Distributed Arithmetic Filter Design
Author :
Santhosh Babu K C, Chirakshitha S, Eashanya K R, Eashanya K R, Ganavi A S, Gowthami GJourna Name:
International Journal of Scientific Research & Engineering Trends Volume:
12 issue:2 Year:Volume-12-issue-2 Views : 179
Abstract:
Efficient digital filtering is critical for modern signal processing applications. This work presents an Adaptive Distributed Arithmetic (ADA)-based FIR filter designed for single-channel and scalable multi-channel configurations on FPGA. The proposed design incorporates error- controlled approximation and optimized computation to reduce LUT usage, power consumption, and processing delay. Implementation using the Xilinx Vivado environment demonstrates improved area efficiency and speed while maintaining acceptable signal quality. The results indicate that the ADA approach is well- suited for low-power, high-throughput FPGA-based DSP applications.
APA:Santhosh Babu K C, Chirakshitha S, Eashanya K R, Eashanya K R, Ganavi A S, Gowthami G. (Volume-12, Issue-2 -(Year-Volume-12-issue-2)). Performance and analysis of Single-channel and Multiple channel based Approximate Distributed Arithmetic Filter Design. Retrieved from https://ijsret.com/wp-content/uploads/1777102907_IJSRET_V12_issue2_488.pdf
Chicago:Santhosh Babu K C, Chirakshitha S, Eashanya K R, Eashanya K R, Ganavi A S, Gowthami G. "Performance and analysis of Single-channel and Multiple channel based Approximate Distributed Arithmetic Filter Design" Example, Volume-12-issue-2-Year-Volume-12-issue-2-2395-566X. https://ijsret.com/wp-content/uploads/1777102907_IJSRET_V12_issue2_488.pdf.